BIST-BASED Group Testing for Diagnosis of Embedded FPGA Cores
نویسندگان
چکیده
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by experiments on the Virtex-5 family of Xilinx FPGAs. High-level HDL code is developed to instantiate a Finite State Machine (FSM) which generates the test inputs for the Blocks Under Test (BUTs). The BUTs are divided into groups of four and at the end of a single stage of testing, up to 2 faulty BUTs are isolated successfully in each group of four. Experiments conducted show efficient fault isolation with a maximum of 30% area overhead under testing conditions. Isolation of faulty DSP cores is rapidly achieved without any permanent area cost. The approach can be readily extended to other embedded cores such as Block RAMs and Multipliers, thus providing a fast, efficient technique for testing prior to System On a Programmable Chip (SoPC) implementation on state of the art SRAM FPGAs.
منابع مشابه
On Embedded Processor Reconfiguration of Logic Bist for Fpga Cores in Socs
Due to the limited access to the individual embedded cores in System-on-Chips (SoCs), testing is more time consuming and costly than testing standalone Field Programmable Gate Arrays (FPGAs). However, the ability for an embedded processor core to reconfigure FPGA cores in SoC applications opens new opportunities for Built-In Self-Test (BIST) of the FPGA cores themselves. This paper discusses a ...
متن کاملBuilt-In Self-Test and Diagnosis of Multiple Embedded Cores in SoCs
An efficient approach is presented for Built-In Self-Test (BIST) and diagnosis of embedded cores in System-on-Chip (SoC) devices using an embedded Field Programmable Gate Array (FPGA) core. The approach targets multiple regular structure cores including memories, multipliers, etc., but can be used to test any set of multiple identical cores in a SoC that also contains an embedded FPGA core with...
متن کاملOn-Chip BIST-Based Diagnosis of Embedded Programmable Logic Cores in System-on-Chip Devices
On-chip Built-In Self-Test (BIST) based diagnosis of the embedded Field Programmable Gate Array (FPGA) core in a generic System-on-Chip (SoC) is presented. In this approach, the embedded processor core in the SoC is used for reconfiguration of the FPGA core for BIST, initiating the BIST sequence, retrieving the BIST results, and for performing diagnosis of faulty programmable logic blocks, memo...
متن کاملAutonomous Built-in Self-Test Methods for SRAM Based FPGAs
Built-in Self-Test (BIST) approaches for Static Random Access Memory (SRAM) based Field Programmable Gate Arrays (FPGAs) must be capable of fully testing the resources in the device. A summary of current techniques is presented in this paper that covers the three main components of modern FPGAs: logic blocks, interconnects and embedded FPGA cores. Overhead requirements, coverage capability, tra...
متن کاملA Dual Configuration BIST-Based Modular Diagnostic Methodology for Embedded Cores in FPGAs
The number of embedded cores in an FPGA has been increasing and different devices use different numbers of different types of hard IP cores. To facilitate failure analysis and reduce its turnaround time, we present an automated BIST-based methodology that exploits the existing redundant resources of an FPGA and its reconfigurabilty to efficiently locate the faulty IP block(s) in addition to pas...
متن کامل